Departments Academic Placement Library Contact us Transport
About Us
Alumni
Gallery
Location Map
Facilities
Antiragging
Our Sister Institutions
Online Fee Payment

DEPARTMENTS

CIVIL - CSE - EEE - ECE - IT - MECH - SCIENCE & HUMANITIES - ME - MTECH - MBA 


 MASTER OF ENGINEERING – VLSI Design

 

  • Established in the year 2011.

  • Offers M.E (Full Time) with an intake of 18 students.

MISSION

  • To ensure an academic environment conducive for achieving the highest levels of academic excellence in the field of VLSI Design

  • To strengthen the students to grow beyond the chosen discipline and to contribute their share for the development of nation.

VISION

  • To improve the qualities of integrity and honesty in the field of Electronics and Communication Engineering and to inspire, energize, motivate and stimulate the creativity of the students.

GOALS

  • To excel in all academic activities.

  • To impart an impetus for continual up gradation and perpetual development.

  • To achieve 100% placement.

SALIENT FEATURES

         Wi-Fi enabled campus

         Well experienced and dedicated faculty with specialization in VLSI Design, Communication systems,Applied electronics, Computer & communication, Embedded system technologies, Microwave and optical Engineering & Digital communication networking

         Three faculty members have completed Ph.D degree and two more faculty are pursuing.

         Fully equipped laboratories and tools that are continuously upgraded to meet the technological challenges.

         Department Library with a wide collection of text books, reference material, Question banks& NPTEL videos.

         In-plant training & industrial visits are arranged for students to get exposure in their core field.

         More than 100 technical papers presented by the faculty in various national and international journals and conferences.

 

LABORATORIES

S. No

Name of the Laboratory

1  

  Electronics Laboratory  - I

2  

  Electronics Laboratory  - II

3  

  Digital Signal Processing Lab

4  

  Microprocessor Laboratory

5  

  Microwave & Optical Fiber Communication Laboratory

6  

  VLSI Laboratory

7  

  Radio Frequency Laboratory

8  

  Electronic System Design Laboratory

9

  P.G VLSI Laboratory

 

image004

image002

Top

Hardware Available

         Equipped with basic to advanced equipments like Analog & Digital CRO, Analog & Digital Function Generators, 100 MHz Digital Storage Oscilloscope, Spectrum Analyzer, Logic analyzer, Analog and Digital Trainer Kits,TDM Modulation and demodulation kit, DSP Trainer Kits, FPGA – Spartan 3, DE2-70 Board (Cyclone Kit), CPLD Kits, Universal Trainer Kits, ARM LPC 2128, IC Testing Trainers, Multimeter, Single and dual Regulated Power Supplies, Fixed Power Supply units in different ranges.

         Equipped with advanced special equipments in addition to academic requirements like Optical Time Domain Reflectometer (OTDR) Kit, Voice Data and Video Transmitter & Receiver Optical Trainer Kit, X-Band Microstrip Trainer Kit, Antenna Trainer Kit with different types of antennas in R.F Band (660-850MHz), C-Band (4-6 GHz), X-Band (8-12GHz) and J-Band.

         Study trainer kits like TV Trainer Kit, Amplitude Modulation/Demodulation Kits, TDM Pulse Amplitude Modulation/Demodulation Kit, PCM Modulation/Demodulation Transmitter Kit, Delta adaptive modulation /demodulation kit, Line coding & decoding kit, Analog Communication Trainer Kit and Digital Communication Trainer Kits, analog signal sampling & reconstructionkit, Model Train Controller interface using Embedded Microcontroller and, Software defined radio.

         Equiped with kits like 8051,8085,8086 & interface boards like real time clock, printer interface, stepper motor, DC motor,8255 PPI, 8251/53 USART ,ADC & DAC, 8259-interrupt.

 

Software Available

  •  Loaded with software’s like CADENCE, MATLAB, ANSOFT Designer, ANSOFT HFSS, XILINX ISE 8.2i, Network Simulator Software, PSPICE, MULTISIM \ULTIBOARD, RAID SOFTWARE, LAB VIEW Software, Altera Quartus,MP lab.

LIBRARY

Particulars

Available

Library -Volumes

352

Library -Titles

245

Journals

6

Reports

18

Top

CO-CURRICULAR ACTIVITIES:

1. Participation in Conference:

 

S. No

Date

Name of Students

Sem

Paper Title

Venue

1 7th & 8th March 2013 R.Aishwarya IV

 

FPGA design of low error fixed width modified booth multiplier multimedia applications Rajas Engineering College, vadakankulam.
2 7th February 2013 S.Mathipriya IV Synchronous Design for FPGA Based power converters using Digital clock manager Dr. SACOE, Tiruchendur.
3 7th February 2013 G.Karunya Elizabeth IV Reduction of spur in MB-OFDM UWB system using CMOS frequency synthesiser Dr. SACOE, Tiruchendur.
7th & 8th March 2013 Reduction of spur in MB-OFDM UWB system using CMOS frequency synthesiser NEC, Kovilpatti
21st & 22nd March 2013 Reduction of spur in MB-OFDM UWB system using CMOS frequency synthesiser MARIA college of Engineering, Thiruvattar.
4th & 5th April 2013 Reduction of spur in MB-OFDM UWB system using CMOS frequency synthesiser Einstein college of Engineering, Tirunelveli.
4 7th February 2013 M. Anitha IV Embedded memory diagnosis based on fail pattern identification Dr. SACOE, Tiruchendur.
4th & 5th April 2013 VLSI based memory diagnosis based on fail pattern identification Einstein college of Engineering, Tirunelveli.
21st & 22nd March 2013 Design of application specific multiple fault diagnosis of FPGA MARIA college of Engineering, Thiruvattar.
5 21st & 22nd March 2013 D. Bindhusha IV VLSI Based iterative channel decoding of FEC based multiple description using Turbo codes MARIA college of Engineering, Thiruvattar.

 

7th February 2013 Implementation of FEC based multiple description using Turbo codes

Dr. SACOE, Tiruchendur.

7th & 8th March 2013 Implementation of FEC based multiple description using Turbo codes NEC, Kovilpatti
6 7th February 2013 R. Saranya IV VLSI based PAPR reduction algorithm for MIMO-OFDM  systems Dr. SACOE, Tiruchendur.
7th & 8th March 2013 FPGA implementation PAPR reduction algorithm for MIMO-OFDM systems Rajaas  Engineering College, vadakankulam.
7 7th February 2013 R. Aishwariya IV Leakage current analysis in CMOS circuits using power gating switches Dr. SACOE, Tiruchendur.
8 7th February 2013 S. Karthiga IV Power minimization in CMOS VLSI Interconnects Dr. SACOE, Tiruchendur.
21st & 22nd March 2013 An efficient Ancoding & Decoding techniques to minimize the power dissipation in CMOS VLSI interconnects MARIA college of Engineering, Thiruvattar.
9 7th February 2013 G. Sweetlin Benila IV Reliable and high performance parity based fault detection scheme for AES Dr. SACOE, Tiruchendur.
21st & 22nd March 2013 Parity based fault detection structure for AES MARIA college of Engineering, Thiruvattar.
10 7th February 2013 R. Shanmuga Priya IV Reed Solomon Decoder based on RIBM algorithm for effective digital signal reception Dr. SACOE, Tiruchendur.
27th March 2013 Efficient error correction codes using pipelined reduced inversion free Berlekamp Massey algorithm for effective digital signal reception Rajaas Engineering College, vadakankulam.
11 7th February 2013 K. Jancy Beryl IV Performance Enhancement of data processing in controllers using 32-bit MCS LA for area efficient and power consumption devices Dr. SACOE, Tiruchendur.
7th & 8th March 2013 Performance Enhancement of data processing in controllers using 64-bit MCS LA for area efficient and power consumption devices NEC, Kovilpatti
12 7th February 2013 A. Jannie Janet Jenitta IV Efficient uniform random number generator by using WT-SR Dr. SACOE, Tiruchendur.
13 7th February 2013 A. Jeyasudha IV Bitmask compression techniques for FPGA configuration using dictionary selection methods Dr. SACOE, Tiruchendur.
14 7th February 2013 S. J. Divya IV Design of reduced delay modified Booth multiplier for DSP applications Dr. SACOE, Tiruchendur.
15 7th February 2013 S. Jebasline Kiruba IV High Speed secure communication of arithmetic coding using BPS algorithm Dr. SACOE, Tiruchendur.
16 4th March 2013 K. Prem Kumar IV Efficient scaling free circular co-ordinate rotation digital algorithm using trigonometric techniques K.S.Rangasamy College of Technology, Thiruchengode.
17 7th February 2013 J. S. Saroj Saranya IV Fast DCT for JPEG compression using algorithm architecture transformation Dr. SACOE, Tiruchendur.
18 7th February 2013 Ashok Kanna IV Design of adaptive network on chip using VLSI techniques Dr. SACOE, Tiruchendur.

2. Participation in Seminars/ Workshops:

Sl. No Name of the Student Date Workshops/ Seminar Venue
1 R. Saranya 12.02.2013 & 13.02.2013

Workshop on Digital Image Processing and its applications using MATLAB

Einstein College of Engineering, Tirunelveli,
2 M. Anitha
3 S. Jebasline Kiruba
4 D. K. Bindhusha
5 G. Karunya Elizabeth

UNIVERSITY RANK HOLDERS:

 

Year

Name

University Rank

2013

P.Aishwarya

18

 

 

2014

R.Jennifer Eunice

20

L.Saranya Devi

28

S.Mahaboob Hameetha Yasin

40

B.Brindhanvan

48

2015

Ms.A.Jesu Silvancy

14

Ms.C.Muthukumari

21

Ms.P.Josephin

29

2016

Ms.P.Selva Mani

17

Ms.M.Arul Thilagavathi

28

Ms.I.J.Divya Prasanna

29

Ms.J.Jerline Mano

31

Ms.K.Anitha

34

 BEST OUTGOING AND OUTSTANDING STUDENTS:

Academic Year

Best Outstanding

2012-2013

N. Aishwariya

2014-2015

A.Jesu Silvancy

2015-2016

P.Selva Mani

2016-2017

Ms.P.Vijayalakshmi

 

Top

Copyright 2008 – 2013 Dr.SIVANTHI ADITANAR COLLEGE OF ENGINEERING.Tiruchendur-628215.
            e-mail: ttn_sacoe@sancharnet.in            All rights reserved.      Feedback        best view in 1024 x 768